Comparative analysis of junctionless and inversion-mode nanosheet FETs for self-heating effect mitigation

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초록

Artificial intelligence computing requires hardware like central processing units and graphic processing units for data processing. However, excessive heat generated during computations remains a challenge. The paper focuses on the heat issue in logic devices caused by transistor structures. To address the problem, the operational mechanism of the Junctionless Field-Effect Transistor (JLFET) is investigated. JLFET shows potential in mitigating heat-related issues and is compared to other nanosheet (ns) FETs. In the case of JL-nsFET, the change in mobility with increasing temperature is smaller compared to Con-nsFET, resulting in less susceptibility to lattice scattering and thermal resistance (Rth) in self-heating effect situation is 0.43 [K mu W-1] for Con-nsFET and 0.414 [K mu W-1] for JL-nsFET. The reason why the Rth of JL-nsFET is smaller than that of Con-nsFET is that JL-nsFET uses a source heat injection conduction mechanism and a large heat transfer area by using a bulk channel.

키워드

junctionlessnanosheet-FET (nsFET)zero-temperature coefficient (ZTC)self-heating effect (SHE)high temperaturegate-all-around FETthermal characteristics
제목
Comparative analysis of junctionless and inversion-mode nanosheet FETs for self-heating effect mitigation
저자
An, Do GyunKim, GaramKim, HyunwooKim, SangwanKim, Jang Hyun
DOI
10.1088/1361-6641/ad10c4
발행일
2024-01-01
유형
Article
저널명
Semiconductor Science and Technology
39
1