Suppression of Reverse Drain-Induced Barrier Lowering in Negative Capacitance FETs Using a Hetero-Metal-Gate Structure

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초록

In this paper, the reverse drain-induced barrier lowering (RDIBL) in the negative capacitance field-effect transistor (NCFET) is discussed. It is found that the RDIBL is attributed to the increase of barrier height between channel and drain with the higher drain voltage ( V-DS). To address this issue, a hetero-metal-gate negative capacitance field-effect transistor (HM NCFET), which features the metal-gate composed of two different work function materials at source and drain sides, is proposed and its electrical characteristics are analyzed with the help of technology computer-aided design (TCAD) simulation. In contrast to the conventional NCFET, the HM NCFET can efficiently suppress RDIBL from -57 mV/V to -3 mV/V by decreasing the work function of metal-gate at drain side from 4.6 eV to 4.0 eV, while the work function of metal-gate at source side is fixed at 4.6 eV.

키워드

Logic gatesIronMOSFETCapacitanceMathematical modelsElectric fieldsThreshold voltageSubstratesSolidsSwitchesReverse drain-induced barrier lowering (RDIBL)negative capacitance field-effect transistor (NCFET)hetero-metal-gate
제목
Suppression of Reverse Drain-Induced Barrier Lowering in Negative Capacitance FETs Using a Hetero-Metal-Gate Structure
저자
Park, Jae YeonSeungwon GoDong Keun LeeSeonggeun KimSihyun KimSangwan Kim
DOI
10.1109/ACCESS.2025.3576583
발행일
2025
유형
Article
저널명
IEEE Access
13
페이지
101782 ~ 101788