Professor Ryu Sung-ju’s Research Team of the Department of System Semiconductor Engineering Has a Paper Accepted at top-tier conference DAC 2026 in Semiconductor Design Automation
Professor Ryu Sung-ju’s research team of the Departments of System Semiconductor Engineering and Electronic Engineering has had a paper accepted to the Design Automation Conference (DAC) 2026, the top-tier conference in the field of semiconductor design automation. Established in 1964, DAC is a prestigious international conference that has led advancements in semiconductor, VLSI (Very Large Scale Integration) design, and related technologies. It is scheduled to be held in Long Beach, USA, from July 26 to 29.
The paper, titled 'Relay-GS: Reusing Temporal Sort Information for 4D Gaussian Splatting Acceleration', was led by Kim Young-geon, Master’s student, with contributions from Ki Seong-min, Integrated Master’s–PhD student, and Jeon Sang-gyu, Integrated Master’s–PhD student.
While 4D Gaussian Splatting (4DGS) has recently gained attention for its high performance in various AI applications based on rendering on VR/AR devices, the massive computational load and energy consumption arising from the iterative gaussian sorting and rasterization processes pose challenges for real-time applications.
To address this issue, the research team analyzed and found that significant similarity exists between timesteps in the gaussian sorting and rasterization stages of the 4DGS computation process. Leveraging this insight, they developed the 4DGS hardware accelerator Relay-GS, which applies a method to reduce computational load while maintaining high accuracy.
Experimental results show that Relay-GS achieves up to a 1.64× reduction in 4DGS computation time compared to existing hardware accelerators while maintaining accuracy comparable to conventional 4DGS models. This is expected to contribute to solving the high computational cost and latency issues in VR/AR devices.
▶Title: Relay-GS: Reusing Temporal Sort Information for 4D Gaussian Splatting Acceleration
▶Authors: Kim Young-geon (First author), Ki Seong-min (Second author), Jeon Sang-gyu (Third author), Professor Ryu Sung-ju (Corresponding author)
[SEO 키워드]
semiconductor design automation, next-generation VR/AR devices, high-performance hardware accelerator
[Summary]
Professor Ryu Sung-ju’s research team has achieved a significant breakthrough in Semiconductor design automation, with their latest work accepted at DAC 2026. The team developed a High-performance hardware accelerator optimized for 4D Gaussian Splatting, offering a vital computational solution for Next-generation VR/AR devices.
The paper, titled 'Relay-GS: Reusing Temporal Sort Information for 4D Gaussian Splatting Acceleration', was led by Kim Young-geon, Master’s student, with contributions from Ki Seong-min, Integrated Master’s–PhD student, and Jeon Sang-gyu, Integrated Master’s–PhD student.
While 4D Gaussian Splatting (4DGS) has recently gained attention for its high performance in various AI applications based on rendering on VR/AR devices, the massive computational load and energy consumption arising from the iterative gaussian sorting and rasterization processes pose challenges for real-time applications.
To address this issue, the research team analyzed and found that significant similarity exists between timesteps in the gaussian sorting and rasterization stages of the 4DGS computation process. Leveraging this insight, they developed the 4DGS hardware accelerator Relay-GS, which applies a method to reduce computational load while maintaining high accuracy.
Experimental results show that Relay-GS achieves up to a 1.64× reduction in 4DGS computation time compared to existing hardware accelerators while maintaining accuracy comparable to conventional 4DGS models. This is expected to contribute to solving the high computational cost and latency issues in VR/AR devices.
▶Title: Relay-GS: Reusing Temporal Sort Information for 4D Gaussian Splatting Acceleration
▶Authors: Kim Young-geon (First author), Ki Seong-min (Second author), Jeon Sang-gyu (Third author), Professor Ryu Sung-ju (Corresponding author)
[SEO 키워드]
semiconductor design automation, next-generation VR/AR devices, high-performance hardware accelerator
[Summary]
Professor Ryu Sung-ju’s research team has achieved a significant breakthrough in Semiconductor design automation, with their latest work accepted at DAC 2026. The team developed a High-performance hardware accelerator optimized for 4D Gaussian Splatting, offering a vital computational solution for Next-generation VR/AR devices.