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초록
As portable and wearable devices are getting smaller and need to achieve a higher performance, a DC-DC converter using a small-size inductor (L) has become necessary. Accordingly, as shown in Fig. 8.8.1, previous researches have suggested various methods to achieve high efficiency with a small size L. Among them, 3-level converters [1, 2] reduce the power loss by reducing the inductor current (iL) ripple, which is the AC component (ΔIL) of iL, by additionally using a flying capacitor (CF). However, this converter is not effective in reducing power loss in recent devices that require a large load current (ILOAD), because a large DC iL (IL,DC) passes through a single L, which causes a large power loss from the DC resistance (RDCR) of the L. A hybrid converter reduces the power loss by reducing both IL,DC and ΔIL owing to a CF that distributes ILOAD [3] because the power loss occurring in the RDCR is proportional to the square of IL,DC. However, this converter cannot avoid a hard switching operation when the CF transfers the charge to the output (VOUT), which causes a noise issue in the system. A multi-phase converter distributes the ILOAD by using an additional L instead of the CF, and thus, it reduces the power loss without the hard switching operation [4]. However, if the Ls have unbalanced iLs, the power loss cannot be effectively reduced. Therefore, this converter requires a complicated technique for balancing iLs. On the other hand, a double stepdown (DSD) converter [5] distributes the ILOAD through two Ls with a CF. The DSD converter is practical because it naturally balances the iLs owing to the topology itself and reduces both IL,DC and ΔIL, which results in high efficiency. However, the DSD converter has a limited voltage conversion ratio (VCR) between 0 and 0.25. The VCR can be extended beyond the DSD converter if one CF and two switches are additionally used as in CF-cross-connected (CCC) converter [6]; however, it still has a limited VCR of between 0 and 0.5. As a result, the DSD and CCC converters can only be used in limited applications. © 2024 IEEE.
- 제목
- 8.8 A 97.18% Peak-Efficiency Asymmetrically Implemented Dual-phase (AID) Converter with a full Voltage-Conversion Ratio (VCR) between 0-and-1
- 저자
- Park, Hyo-Jin; Cho, Joo-Mi; Lee, Chan-Ho; Oh, Young-Ju; Jeong, Hyunwoo; Yang, Jun-Hyeok; Lee, Jaeseung; Hong, Sung-Wan
- 발행일
- 2024
- 유형
- Conference Paper
- 저널명
- Digest of Technical Papers - IEEE International Solid-State Circuits Conference
- 페이지
- 158 ~ 160