A Two-Unit-Interval Window Oversampling Referenceless Clock and Data Recovery for Robust Frequency Detection Against Duty-Cycle Distortion of Received Data

초록

This paper proposes a reference-less clock and data recovery (CDR) architecture that employs two-unit-interval (2-UI) windowing for frequency acquisition. The proposed 2-UI-based frequency detector (FD) enables half-rate frequency tracking without frequency-detection errors even in the presence of duty-cycle distortion (DCD) in the received data. Conventional Extended Bang-Bang Phase Detector (XBBPD) suffers from sampling errors near data transition edges due to variations in the reference interval for frequency detection. This results in false frequency-up/down (FUP/FDN) signals and may lead to prolonged stabilization time. Moreover, conventional XBBPD-based FD requires careful tuning of the FLL gain and lock-detection tolerance to avoid false lock or lock release under DCD. To address these limitations, the proposed FD employs six sampling points over a 2-UI window, effectively avoiding DCDaffected regions while maintaining a constant reference interval, thereby reducing the probability of mis-detections during frequency tracking. The prototype, fabricated in a 28-nm FD-SOI process, tolerates up to 11% duty-cycle distortion without frequency detection errors. The proposed reference-less CDR achieves a minimum lock time of 1.5 & micro;s and an energy efficiency of 1.57 pJ/bit at 14 Gb/s.

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