Electrical Characterization by Counter-Doped Pocket Design in Tunnel FETs

  • Nam, Ki Ryung
  • Kim, Kwang Soo
  • Choi, Woo Young
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초록

The effects of low net-doped region on the electrical performance of tunnel field-effect transistors (TFETs) are investigated using a TCAD simulation. Compared with previous studies, it is observed that the low net-doped region between the source and pocket can enhance TFET electrical characteristics such as the on-current (I-on) and subthreshold swing (SS) with fine on-off current ratio (I-on/I-off). By optimizing the length of the low net-doped region, I-on increased 14.6 times and SS is reduced by 34.6 % compared with the TFET where the low net-doped region was not considered. Furthermore, guidelines for designing counter-doped pocket are proposed considering the low net-doped region. The local minimum in the conduction band can be used to further improve the on-current and SS performance by adjusting the pocket width and doping concentration. To avoid pocket-induced SS degradation, the pocket doping concentration must also considered when determining the optimal value of the pocket width and vice versa.

키워드

TFETsDopingTunnelingElectric variablesJunctionsLogic gatesElectric fieldsTunnel field-effect transistor (TFET)counter-doped pocketlow net-doped regionpocket widthtunneling widthFIELD-EFFECT TRANSISTORSSUBTHRESHOLDMODEL
제목
Electrical Characterization by Counter-Doped Pocket Design in Tunnel FETs
저자
Nam, Ki RyungKim, Kwang SooChoi, Woo Young
DOI
10.1109/ACCESS.2023.3262285
발행일
2023
유형
Article
저널명
IEEE Access
11
페이지
30546 ~ 30554