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초록
Built-in freewheeling diode metal-oxide-semiconductor field-effect transistors (MOSFETs) that ensure high performance and reliability at high voltages are crucial for chip integration. In this study, a 4H-SiC built-in MOS-channel diode MOSFET with a center P+ implanted structure (CIMCD-MOSFET) is proposed and simulated via technology computer-aided design (TCAD). The CIMCD-MOSFET contains a P+ center implant region, which protects the gate oxide edge from high electric field crowding. Moreover, the region also makes it possible to increase the junction FET (JFET) and N-drift doping concentration of the device by dispersing the high electric field. Consequently, the CIMCD-MOSFET is stable even at a high voltage of 3.3 kV without static degradation and gate oxide reliability issues. The CIMCD-MOSFET also has higher short-circuit withstanding capability owing to the low saturation current and improved switching characteristics due to the low gate-drain capacitance, compared to the conventional MOSFET (C-DMOSFET) and the built-in Schottky barrier diode MOSFET (SBD-MOSFET). The total switching time of a CIMCD-MOSFET is reduced by 52.2% and 42.2%, and the total switching loss is reduced by 67.8% and 41.8%, respectively, compared to the C-DMOSFET and SBD-MOSFET.
키워드
- 제목
- High Performance 3.3 kV SiC MOSFET Structure with Built-In MOS-Channel Diode
- 저자
- Na, Jaeyeop; Kim, Minju; Kim, Kwangsoo
- 발행일
- 2022-10
- 유형
- Article
- 저널명
- Energies
- 권
- 15
- 호
- 19