Comparative study of static and dynamic D-type flip-flop circuits using InPHBT's

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초록

A static and a dynamic D-type flip-flops (D-FFs) using InP heterojunction bipolar transistors (HBTs) were analyzed. Both the static and dynamic D-FFs employed conventional read/latch structure, however the dynamic D-FF had smaller latch current than the read current to improve the bandwidth. The static D-FF exhibited the maximum operating bit rate of 12 Gbit/s with rising/falling time of 67 ps/45 ps. The dynamic D-FF operated up to 20 Gbit/s with rising/falling time of 50 ps/32 ps. A dynamic D-FF exhibited the minimum operating bit rate of 1 Gbit/s.

키워드

DEMUX
제목
Comparative study of static and dynamic D-type flip-flop circuits using InPHBT's
저자
Yeo, HSBurm, JKim, SIMin, BGJu, CW
DOI
10.1109/APASIC.2004.1349494
발행일
2004
유형
Proceedings Paper
저널명
PROCEEDINGS OF 2004 IEEE ASIA-PACIFIC CONFERENCE ON ADVANCED SYSTEM INTEGRATED CIRCUITS
페이지
352 ~ 355