Noise-Limited Bit Precision in Ferroelectric Synaptic Transistors for High-Resolution Neuromorphic Computing

초록

Neuromorphic hardware requires synaptic devices with reliable multilevel states, yet the precision of emerging synaptic devices is often assessed through experimental demonstration rather than a quantitative principle, hindering meaningful comparison across platforms. Here, we introduce a methodology based on low-frequency noise (LFN) spectroscopy to quantify the multilevel limit of synaptic devices, while also proposing a new metric for evaluating bit precision. We apply this approach to ferroelectric transistors with three representative channel materials, single-crystalline Si (c-Si), polycrystalline Si (poly-Si), and amorphous oxide semiconductor (AOS), which respectively offer a benchmark for high-performance transport, a scalable silicon platform compatible with 3D integration, and a platform for low-temperature and large-area electronics. It is demonstrated that bit precision is determined by the interplay between dynamic range and noise amplitude, rather than memory window alone. Furthermore, we demonstrate how differences in bit precision affect the performance of large-scale neural networks. This methodology establishes LFN-based signal resolution as a key reliability metric, enabling precise benchmarking and guiding the design of high-performance neuromorphic hardware across materials and device architectures.

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