A Second-order 8.3-MHz BW Noise-shaping SAR ADC Using Shared Amplifier for Lossless Switched-capacitor Integration

  • Lee, Young Hwan; 
  • Lim, Jae Geun; 
  • Kim, Hyoung Jung; 
  • Lee, Jae Hyuk; 
  • Park, Seong Bo; 
  • ... Ahn, Gil Cho; 
  • 외 3명
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초록

This paper presents an 8.3-MHz second-order noise-shaping successive approximation register (NS-SAR) analog-to-digital converter (ADC). To achieve an ideal second-order noise transfer function (NTF), an integrator combining an amplifier with a ping-pong switched-capacitor (SC) is used. By sharing the amplifier between two integrators, the design reduces the area of the loop filter. Implemented in a 28 nm CMOS process, the prototype achieves a bandwidth of 8.3 MHz while operating at a 100 MHz with an oversampling ratio (OSR) of 6. It achieves a signal-to-noise and distortion ratio (SNDR) of 66.1 dB, and a dynamic range (DR) of 69.8 dB while consuming 2.93 mW from a 1 V supply. The resulting Schreier figure-of-merit (FoMS) is 160.6 dB, and the Walden FoM (FoMW) is 107.0 fJ/conversion-step. The active die area occupies 0.101 mm2.

키워드

Analog-to-digital converter (ADC); noise-shaping successive approximation register (NS-SAR); noise; transfer function (NTF); lossless integration; a ping-pong switched-capacitor (SC); DELTA-SIGMA; FOLLOWER; SNDR; DB
제목
A Second-order 8.3-MHz BW Noise-shaping SAR ADC Using Shared Amplifier for Lossless Switched-capacitor Integration
저자
Lee, Young Hwan; Lim, Jae Geun; Kim, Hyoung Jung; Lee, Jae Hyuk; Park, Seong Bo; Choi, Seong U; Yang, Joo Yeul; Boo, Jun Ho; Ahn, Gil Cho
DOI
10.5573/JSTS.2025.25.5.576
발행일
2025-10
유형
Article
저널명
JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE
권
25
호
5
페이지
576 ~ 584