A High-Bandwidth PCM-Based Memory System for Highly Available IP Routing Table Lookup

초록

Achieving higher availability is an unending challenge in router architecture, as process technology scales down and more random logic/memory errors must be tolerated. However, meeting extremely high targets that require only few seconds of yearly downtime puts even more pressure on the design of already complex router architecture. In this paper, we explore the case of storing the routing table in non-volatile memory, to drastically reduce the router downtime and achieve higher availability-without degrading lookup performance. We propose a new MLC PCM architecture, featuring decoupled node access and logically managed duplicate bank groups, that fetches the right amount of information from the most available bank. Performance evaluation shows that we achieve an average of 9.9 percent bandwidth improvement over the DRAM baseline system, and an 83.9 percent over the PCM baseline.

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