A Sub-1V, 50mV Dropout LDO Using Pseudo-Impedance Buffer with Phase-Margin Improvement Design

초록

As technology continues to scale down, the supply voltage (VIN) of systems has gradually decreased. At the same time, devices require a larger load current (IL) due to a higher performance of the system. Accordingly, it is important that a low-dropout regulator (LDO) operates at low-VIN (specifically sub-1V) and drives heavy IL at the same time. Digital LDOs have been used in sub-1V applications. However, they suffer from a large output voltage (VOUT) ripple [1] even with an off-chip output capacitor (CO) because of a limit cycle oscillation. On the other hand, the analog LDOs are free from the VOUT ripple. When an analog LDO uses a CO, a multi-stage structure usually has a narrow bandwidth (BW) and becomes unstable under light load conditions. This is because Miller compensation is not effective in this case. Therefore, to stably handle light load or even no-load conditions while maintaining sufficient BW at low-VIN, the LDO needs to be designed as a low-VIN structure, comprising a single-stage error amplifier (EA), a buffer, and a pass transistor (MP), avoiding the use of Miller compensation, as shown in Fig. 9.5.1 (top). In low-VIN analog LDOs, a current mirror (CM) buffer that composes the CM with the MP has been commonly used because this buffer properly operates with a small voltage headroom and has a relatively low resistance of 1/gm, which widens BW. This CM buffer can be driven by a simple EA [2] or a transconductance (Gm) boosting cell [3]-[4], as shown in Fig. 9.5.1 (top-left and -middle), respectively. Since the EA cannot adopt a cascode structure due to the voltage headroom, an LDO that uses the EA exhibits a low DC gain, particularly when supplying a large IL. Moreover, the output pole of the EA (ωEA) limits the BW under the heavy load condition. On the other hand, the Gm-boosting cell can have a higher gain than that of the simple EA while it does not have a low frequency ωEA because the Gm cell commonly comprises several current mirrors of which ratio is larger than one. However, LDOs with not only the EA but also the Gm-boosting cell have limitations in supplying a wide range of IL because of the CM buffer. To supply a large IL, the ratio (K) between a CM buffer transistor (MC) and the MP must be high. However, with the high K (K2), the LDO cannot properly supply a small IL. This is because the bias current of MC (IC) becomes considerably small in this case, which increases the buffer resistance, and finally shifts the gate pole of the MP (ωG) to the low frequency. This phenomenon could be severe when the LDO uses the Gm-boosting cell because the conventional Gm cell has a bias current related to the IL. On the other hand, when the ratio K is low (K1), the LDO can supply a small IL. However, this limits supplying a large IL due to the limited source-gate voltage (VSG) of the MP by the limited voltage headroom, especially in sub-1V VIN LDOs. Because of these reasons, previous LDOs using the CM buffer cannot cover a wide range of IL, as shown in Fig. 9.5.1 (top-right), and usually focus on the light IL to cover the no-load condition [2-4]. © 2025 IEEE.