P-Type Ternary Logic MOSFET With Tunable Middle State Using Bidirectional Threshold Switching

  • Han, Jeong-A
  • Lee, Jung-Woo
  • Han, Joon-Kyu
  • Kim, Do-Wan
  • Lee, Do-Hoon
  • 외 1명
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초록

A p-type ternary logic MOSFET (P-TMOS), which serves as the counterpart to a previously reported n-type ternary logic MOSFET (N-TMOS) but has been missing for the construction of a complementary standard ternary inverter, is demonstrated. The P-TMOS consists of a PMOS and an n-type threshold switch (TS) connected in series. While the PMOS determines the type of the ternary logic device, the TS, despite being an n-type device, provides both n-type and p-type characteristics, making it bidirectional with a tunable middle state in ternary logic. This tunable middle state is attractive for balancing noise margin and controlling power-delay product. By leveraging mature CMOS technology capable of large-scale fabrication, the Si-based P-TMOS facilitates the practical implementation of a ternary logic system.

키워드

Multi-valued logic (MVL)ternary logicp-type ternary logic MOSFET (P-TMOS)threshold switchMulti-valued logic (MVL)ternary logicp-type ternary logic MOSFET (P-TMOS)threshold switchMULTIPLE-VALUED LOGICBIRISTOR
제목
P-Type Ternary Logic MOSFET With Tunable Middle State Using Bidirectional Threshold Switching
저자
Han, Jeong-ALee, Jung-WooHan, Joon-KyuKim, Do-WanLee, Do-HoonChoi, Yang-Kyu
DOI
10.1109/LED.2024.3505154
발행일
2025-01
유형
Article
저널명
IEEE Electron Device Letters
46
1
페이지
16 ~ 19