A Middle-Capacitor-free Two-Stage 48V to 1-1.2V Converter using Fixed 0.5 Duty-Cycle Switched-Capacitor

  • Lee, Chan-Ho
  • Jeong, Hyun-Woo
  • Shin, Jeeyoung
  • Choi, Woong
  • Jeong, Junwon
  • 외 1명
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초록

This paper proposes a 48V to 1-1.2V two-stage converter, consisting of a high-voltage (HV) switched-capacitor (SC) stage and a low-voltage (LV) buck converter stage. By fixing the duty-cycle (D) of the HV SC at 0.5, peak current in HV SC is optimized, minimizing conduction loss (PCON) in the HV SC. In addition, the continuous capacitor-current (IC) path in the LV stage enables removing a middle-capacitor and improves transient response. The proposed converter supports up to a 4A maximum load current and achieves peak efficiencies of 90.9% at output voltage (VO) of 1V and 92.1% at VO of 1.2V. © 1986-2012 IEEE.

키워드

Fibonacci switched capacitorMiddle capacitor freeTwo stage converter
제목
A Middle-Capacitor-free Two-Stage 48V to 1-1.2V Converter using Fixed 0.5 Duty-Cycle Switched-Capacitor
저자
Lee, Chan-HoJeong, Hyun-WooShin, JeeyoungChoi, WoongJeong, JunwonHong, Sung-Wan
DOI
10.1109/TPEL.2026.3676469
발행일
2026-09
유형
Article
저널명
IEEE Transactions on Power Electronics
41
9
페이지
14329 ~ 14333