Concurrent transistor sizing and buffer insertion by considering cost-delay tradeoffs

  • Kim, Juho; 
  • Bamji, Cyrus; 
  • Jiang, Yanbin; 
  • Sapatnekar, Sachin
Citations

SCOPUS

9
제목
Concurrent transistor sizing and buffer insertion by considering cost-delay tradeoffs
저자
Kim, Juho; Bamji, Cyrus; Jiang, Yanbin; Sapatnekar, Sachin
DOI
10.1145/267665.267703
발행일
1997
유형
Conference Paper
저널명
Proceedings of the International Symposium on Physical Design
페이지
130 ~ 135