A Third-Order DT Delta-Sigma Modulator With Noise-Coupling Technique

초록

This paper presents a single-loop third-order delta-sigma modulator. It uses delayed feed-forward (FF) architecture to relax the op-amp requirement of the integrators. Noise-coupling technique is employed to obtain third-order noise shaping with two integrators. The prototype analog-to-digital converter (ADC) fabricated in a 0.18pm CMOS process achieves a 90.1 dB dynamic range (DR) and a 87.0 dB peak signal-to-noise and distortion ratio (SNDR) over a signal bandwidth of 160kHz with OSR of 32. The modulator occupies an active die area of 0.225 mm(2), and its power consumption is 2.52mW from a 1.8V supply voltage.

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