OptiRange: An Efficient ReRAM-Based PIM Accelerator with ADC Resolution Optimization

초록

Processing-in-memory (PIM) techniques have attracted significant attention in computer architecture research due to their ability to mitigate the memory wall bottleneck for deep neural network (DNN) applications. In-memory computing (IMC) using ReRAM crossbar arrays is promising for energy efficiency but suffers from high-cost peripheral circuits, particularly analog-to-digital converters (ADCs). There are existing methods to reduce ADC energy consumption, such as lowering resolution or sharing an ADC among multiple columns. Unfortunately, these techniques reduce throughput. In this work, we propose OptiRange for PIM accelerators that enhances both energy efficiency and throughput while maintaining accuracy and model flexibility. OptiRange proposes a split-the-burden (STB) algorithm that manipulates crossbar cell values without changing the weights. STB reduces large cell values, shifts the column-sum distribution center closer to zero, and minimizes the number of low-resistance state (LRS) cells, significantly lowering the hardware-level fixed ADC resolution and improving accuracy. Furthermore, OptiRange utilizes dynamic ADC range (DAR) adaptation, determining the optimal ADC operating range per column at the software level and enabling the skipping of redundant ADC conversion cycles at runtime. An associated ADC range-based grouping (AG) strategy leverages the resulting dynamic latencies to manage synchronization and further boost system throughput. By combining weight-preserving cell manipulation with adaptive ADC operation and synchronization, OptiRange dynamically optimizes the ADC workload. Experimental results indicate that our method significantly enhances overall performance compared to conventional ReRAM-based accelerators. © 2025 IEEE.

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