A High Slew-rate Wide-range Capacitive Load Driving Buffer Amplifier with Correlated Dual Positive Feedback Loops

초록

This paper presents a capacitive load driving buffer which has a high slew-rate. To achieve a higher slew-rate while consuming a lower power, the proposed amplifier utilizes dual positive feedback loops which dynamically increase driving current only when transient occurs. These two positive feedback loops are designed to be correlated for a higher slew-rate. The proposed amplifier was designed in 0.18 mu m CMOS process and it accomplished the highest figure-of-merit (FOM) of 1195 among state-of-the-art amplifiers.

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