상세 보기
A 30-MHz Voltage-Mode Buck Converter Using Delay-Line-Based PWM Control
- Huang, Qiwei;
- Zhan, Chenchang;
- Burm, Jinwook
WEB OF SCIENCE
28SCOPUS
31초록
A 30-MHz voltage-mode buck converter using a delay-line-based pulse-width-modulation controller is proposed in this brief. Two voltage-to-delay cells are used to convert the voltage difference to delay-time difference. A charge pump is used to charge or discharge the loop filter, depending on whether the feedback voltage is larger or smaller than the reference voltage. A delay-line-based voltage-to-duty-cycle (V2D) controller is used to replace the classical ramp-comparator-based V2D controller to achieve wide duty cycle. A type-II compensator is implemented in this design with a capacitor and resistor in the loop filter. The prototype buck converter was fabricated using a 0.18-mu m CMOS process. It occupies an active area of 0.834 mm(2) including the testing PADs. The tunable duty cycle ranges from 11.9%-86.3%, corresponding to 0.4 V-2.8 V output voltage with 3.3 V input. With a step of 400 mA in the load current, the settling time is around 3 mu s. The peak efficiency is as high as 90.2% with 2.4 V output and the maximum load current is 800 mA.
키워드
- 제목
- A 30-MHz Voltage-Mode Buck Converter Using Delay-Line-Based PWM Control
- 저자
- Huang, Qiwei; Zhan, Chenchang; Burm, Jinwook
- 발행일
- 2018-11
- 유형
- Article
- 권
- 65
- 호
- 11
- 페이지
- 1659 ~ 1663